Method And Apparatus For Reducing Server Power Supply Size And Cost

ABSTRACT

Computing and server power supplies are typically sized larger to deliver the maximum power the system may need. However since systems are not often used to capacity a smaller power supply may be used in conjunction with a thermal sensor to monitor a critical component of the power supply defined as the particular component within the power supply whose temperature reaches its maximum allowed limit sooner than any other power supply component when the average (continuous) power may exceed the power supply&#39;s max rating. When a critical temperature has been reached, an interrupt signal is generated by the power supply to signal the host to throttle back until the temperature comes back into an acceptable range.

FIELD OF THE INVENTION

Embodiments of the present invention are directed to power supplies forservers and the like and, more particularly, to reducing the size ofpower supplies without overly affecting performance.

BACKGROUND INFORMATION

In existing server systems, the power supply (PS) is sized for fullsystem configuration running power virus software. This results inlarger power supply size/wattage rating and higher system cost. In highdensity systems it significantly limits the available board space andsystem configurations. At the same time, in real applications systemutilization remains at about 20-25% level, and the power supply isloaded to a small portion of its power rating. For redundant powersupply configurations, where at least two power supplies share commonload, average (typical) PS load additionally drops by a factor of two.

A power specification for a computer system, P_(MAX), usually definesmaximum power capability of the power supply in the system. In theprocess of determining a value of P_(MAX), system designers usuallyconsider the worst-case configuration of a system. Thus, P_(MAX) for asystem represents power consumption when the system is fully populatedwith hardware. The determination of P_(MAX) also assumes that the systemis configured with the most power hungry components capable of beingused in that configuration, and that the system is running software thatcauses it to consume maximum power.

The present methods for determining P_(MAX), suffer from variousdisadvantages. First, most systems are populated with less hardwarecomponents than their capacity. Second, in the vast majority of casesnot all the components used are the most power hungry. For example, manysystems may be using slower processors that usually consume less power,and the CPU utilization is infrequently being used to 100% capacity. Onaverage, most of the systems consume power far lower than P_(MAX), andhence could function adequately with a smaller power supply.

FIG. 1 comprises a histogram of real system CPU utilization in adatacenter over extended period of time (1 week) and clearly illustratesthis point. Because of the low utilization rate and recent trend in idlepower reduction, system power supplies are oversized, operate at lowpower levels and therefore have comparatively low efficiency and lowpower factor. This opens the opportunity for significant power supplysize and cost reduction, without affecting system performance, and forimprovement system performance-per-watt score.

BRIEF DESCRIPTION OF THE DRAWINGS

The foregoing and a better understanding of the present invention maybecome apparent from the following detailed description of arrangementsand example embodiments and the claims when read in connection with theaccompanying drawings, all forming a part of the disclosure of thisinvention. While the foregoing and following written and illustrateddisclosure focuses on disclosing arrangements and example embodiments ofthe invention, it should be clearly understood that the same is by wayof illustration and example only and the invention is not limitedthereto.

FIG. 1 is a histogram of typical central processing unit (CPU)utilization over a period of 1 week illustrating that the CPU may rarelybe used to capacity for extended periods;

FIG. 2 is a block diagram showing a power supply modified according toone embodiment of the invention; and

FIG. 3 is a timing diagram illustrating one example of operation of theinvention.

DETAILED DESCRIPTION

Reference throughout this specification to “one embodiment” or “anembodiment” means that a particular feature, structure, orcharacteristic described in connection with the embodiment is includedin at least one embodiment of the present invention. Thus, theappearances of the phrases “in one embodiment” or “in an embodiment” invarious places throughout this specification are not necessarily allreferring to the same embodiment. Furthermore, the particular features,structures, or characteristics may be combined in any suitable manner inone or more embodiments.

Embodiments of the present invention describe a new concept of serverpower supply design approach and system power management. The approachis based on developing a power supply with continuous power rating muchlower (e.g. 50+% lower) than the peak by using a smaller power supplybut monitoring the temperature of the power supply, which will tend toheat up during relatively infrequent prolonged periods of peak use, andthrottling back the system if the power supply approaches a criticaltemperature to prevent damage, but still allow the CPU to complete itstasks, albeit in a throttled back capacity.

In particular embodiments the invention may use a thermal sensor tomonitor a critical component of the power supply defined as theparticular component within the power supply which temperature reachesits maximum allowed limit sooner than any other power supply componentwhen generated average (continuous) power exceeds its max rating. Thiscomponent may be any component in the power supply, such as, forexample, an inductor, a winding, a bridge, a particular circuit, etc.and of course may vary from power supply to power supply depending onthe particular architecture of the power supply.

-   -   Embodiments further may generate an interrupt signal when this        component reaches critical temperature to throttle back the        system to decrease the load on the power supply prior to        overheating. In one embodiment the System Management Bus Alert        Signal (SMBAlert#) may be used for this purpose. In brief, the        System Management Bus (SMBus) is an external bus interface that        may interface with the I/O controller using the SMBus. As        defined by the SMBus specification, SMBAlert# is an input-only        signal to the I/O controller. In particular, SMBAlert# is a        signal that is an interrupt line for devices that trade their        ability to master for a pin. SMBAlert# is a wired-AND signal and        used in conjunction with the SMBus general call address.        Messages invoked with the SMBus may be two bytes long.

A slave-only device, such as an external system management controller,or in this case the power supply, can signal the host through SMBAlert#that it wants to talk. The host processes the interrupt andsimultaneously accesses all SMBAlert# devices through the alert responseaddress. In this case, the SMBAlert# is generated in response to a powersupply reaching its maximum temperature or first critical thresholdcausing the host to throttle back. Throttling may include many things.For example, in response to the temperature condition, the operatingsystem may slow down operation of the processor clock, known as clockthrottling. Alternately or in addition to, non-essential components mayalso be slowed or shut down in an orderly fashion. Basically, throttlingmay be any action taken to reduce power consumption, and thus reduce theload on the power supply, until such time as the temperature of thecritical component in the power supply cools and drops below a secondpredetermined threshold.

FIG. 2 shows a block diagram of a power supply 200 modified to generatean interrupt signal, such as a SMBAlert#, in response to a temperaturecondition. The block-diagram represents analog/digital way ofimplementing the concept, but the functions of the elements in thisdiagram may also be provided with a microcontroller.

The power supply 200 includes the SMBAlert# generating circuit 202, athermal sensor 204 monitoring the temperature of the power supplycritical component, as previously defined as the component whichtemperature reaches its max allowed limit sooner than any other powersupply component, when generated average (continuous) power exceeds itsmax rating. The thermal sensor 204 may be a thermistor or a microelectromechanical system (MEMS) sensor, or any other suitable device.

The power supply 200 may also include a comparator 206 receiving thesignal from the thermal sensor 204 and from a reference thresholdvoltage 208. The power supply 200 may also include an OR-gate 210, whoseinputs are coupled to the SMBAlert# signal generating circuit outputwhich may assert this signal for other warning and failure conditionsbesides overheating such as overcurrent conditions, overpower, AC inputout of range, etc., as well as to the output signal from the comparator206. The OR-gate output is coupled to the baseboard 212 SMBAlert#terminal for the host.

Referring now to FIG. 3, there is shown a timing diagram illustratingexemplary operation details of one embodiment of the invention.

At time t0-t1, if system operates in its idle state and the powerconsumed from the power supply is low (P=Pidle) then the temperature ofthe critical component remains below its max limit.

At time interval t1-t2, at low utilization rate, the temperaturefluctuates at the levels slightly above the idle. That is, it ramps upwhen system operates in active state and ramps down when it switchesinto the idle state, but never comes close to reaching criticaltemperature.

At time interval t2-t3, once system returns to idle for extended periodof time, the temperature of the critical component asymptoticallyapproaches its idle level.

At time t3, when the server may be experiencing high utilization andaverage power (Pavg2) exceeds the power supply rating Pavg max, thetemperature of the critical component starts to ramp up and at somemoment of time (t4) reaches level Tassert. At this moment the comparator(206, FIG. 2) trips and causes the SMBAlert# signal to be asserted.

During time interval t4-t5, upon receiving the SMBAlert# signal, thesystem gets throttled down, and continues to handle all job requests,but driving memory/processor power reduction, so that its average power(Pavg3) drops below the power supply rating. During this time period thecritical component temperature ramps down.

During time interval t5-t6, once the temperature of the criticalcomponent eventually drops to the Tde-assert level, the SMBAlert# getsde-asserted and system either operates at a low utilization rate, or—ifthere is still a demand for high utilization, the process of ramping thecomponent temperature up and assertion of the SMBAlert# will berepeated.

Thus, according to embodiments the system will operate at its maxperformance, even using a smaller power supply until the power supplytemperature limit is reached, after that the system will be operated ina safe mode allowing it to complete the job (if it takes longer than thetime interval required to reach Tassert) without a shutdown. Thisinvention opens the opportunity for significant server system powersupply size and cost reduction without overly affecting systemperformance. Further, a smaller power supply frees space, addingcomponents to the baseboard and for improvement systemperformance-per-watt score.

In other embodiments, when multi-output power supplies are used, theymay incorporate several temperature sensors monitoring temperatures ofthe critical components in each channel and asserting the SMBAlert# whenany of these temperatures exceeds corresponding T_(assert) level. Inother embodiments, at low ambient temperatures, or in a redundant (1+1,2+1, 2+2, etc) power supply configuration where several power suppliesshare common load, the power supplies may be capable of supplying fullpower without reaching the Tassert level. In these cases systemthrottling may occur when the ambient temperature gets higher, or whenone of the Power supplies (or AC sources) fails. This gives theopportunity to achieve the most effective power supply utilizationregardless of ambient temperature level, drastically (and in some cases˜2×) lower power supply power rating and cost, to reduce power subsystemdimensions, expand the baseboard, and get the space for additionalsystem components.

The above description of illustrated embodiments of the invention,including what is described in the Abstract, is not intended to beexhaustive or to limit the invention to the precise forms disclosed.While specific embodiments of, and examples for, the invention aredescribed herein for illustrative purposes, various equivalentmodifications are possible within the scope of the invention, as thoseskilled in the relevant art will recognize.

These modifications can be made to the invention in light of the abovedetailed description. The terms used in the following claims should notbe construed to limit the invention to the specific embodimentsdisclosed in the specification and the claims. Rather, the scope of theinvention is to be determined entirely by the following claims, whichare to be construed in accordance with established doctrines of claiminterpretation.

What is claimed is:
 1. A power supply, comprising: a plurality ofcomponents for delivering power; a critical component among theplurality of components; a thermal sensor to monitor the temperature ofthe critical component; and a circuit for generating an interrupt signalif the thermal sensor senses that the critical component has reached afirst threshold temperature.
 2. The power supply as recited in claim 1,wherein the interrupt signal causes a host system to throttle.
 3. Thepower supply as recited in claim 2 wherein the power supply has a lowerpower rating than that required by the host during peak utilizationtimes.
 4. The power supply as recited in claim 1 wherein the interruptsignal comprises a SMBAlert# signal.
 5. The power supply as recited inclaim 1 wherein the circuit for generating the interrupt signalcomprises a comparator for comparing the output of the thermal sensor toa reference signal.
 6. The power supply as recited in claim 1 whereinthe circuit for generating the interrupt signal is a microprocessor andthe interrupt signal is determined by software.
 7. A method, comprising:identifying a component within a power supply that reaches its maximumtemperature during heavy load times before other components; monitoringthe temperature of the identified component; and generating in signal tocause a device receiving power from the power supply to throttle whenthe component reaches an upper threshold temperature.
 8. The method asrecited in claim 8 wherein the device receiving power is a computingdevice.
 9. The method as recited in claim 8 wherein the interrupt signalcomprises a SMBAlert# signal.
 10. The method as recited in claim whereinthe throttling comprises: causing the computing device to operate at aslower clock rate.
 11. The method as recited in claim 7 furthercomprising: deasserting the interrupt signal when the componenttemperature drops to a lower threshold temperature.
 12. The method asrecited in claim 7 wherein the generating comprises a comparator forcomparing the temperature of the component to a temperature warningthreshold signal.
 13. The method as recited in claim 7 wherein thegenerating is done with software.
 14. The method as recited in claim 7,further comprising: sizing the power rating of the power supply smallerthan the power rating of the device receiving power.
 15. A system forusing a smaller power supply than a power supply called for by acomputer, comprising: a power supply; a temperature sensor within thepower supply; means for generating an interrupt signal to cause thecomputer to throttle when the temperature sensor detects a thresholdtemperature has been reached.
 16. The system as recited in claim 14,further comprising: a component within the power supply that reaches itsmaximum allowable temperature before other components which is monitoredby the temperature sensor.
 17. The system as recited claim 14 whereinthe interrupt signal comprises a SMBAlert# signal.
 18. The system asrecited in claim 17 wherein throttling comprises running the computingdevice at a slower clock speed.
 19. The system as recited in claim 17wherein the computing device comprises a server.